CHAITANYA BHARATHI INSTITUTE OF TECHNOLOGY (A)
  • VLSI Design-ECE-E3-AY-2020-21
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  • Course data
    General
    Slip Test-1
    Sliptest1
    Slip Test 2
    SlipTest 3
    EDA Lab
    EDA Lab Test
    EDA Lab Test-L
    Unit 1
    Review of Verilog HDL-Video-1
    Review of Verilog HDL-Video-2
    Dataflow and behavioural modeling-Video
    Switch level modeling-Video
    Gate level and Data flow level modeling-ppt
    UDP
    Logic synthesis
    FSM
    Design of Mealy and Moore in Verilog
    Tasks and Functions
    Unit-1-ppt
    Unit2
    Introduction to MOS Technology
    Basic MOS Transistor action: Enhancement and Depletion Modes.
    Basic electrical properties of MOS
    Threshold voltage and Body effect
    nMOS fabrication process steps
    CMOS fabrication process steps
    MoS Circuit Design Process-Stick diagram
    Lambda based Design rules and Layout diagrams
    UNIT2-PPT
    Revision
    Unit-3
    Process steps in IC fabrication Crystal Growth
    Wafer preparation-silicon shaping, slicing and polishing
    Metallization and packaging
    Wafer processing-oxidation,lithograpghy
    Doping and Ion Implantation
    Unit 3 -ppt
    Unit 4
    nMOS logic
    nmos inverter with different loads
    NMOS inverter with DMOS as load
    CMOS inverter
    CMOS logic-NAND-NOR-Noise margin
    CMOS-NAND,NOR,Transmission logic gate, D flipflop using Transmission gates
    BiCMOS logic-AOI-OAI
    EDA lab-Code converters
    unit 4 - material
    Unit 5
    SRAM and 1T-DRAM
    3T-DRAM and NOR based and NAND based ROM
    Subsystem Design: Multiplexor, Comparator, Shifters, Programmable Logic Arrays.
    Unit 5 ppt
    Memory concepts-2
    Memory concepts-1
    Introduction to Testing
    EDA Lab
    lab 1
    lab2
    lab3-UDPs and Tasks&Functions
    Lab 4-FSM and Comparator
    Lab 5-Switch level modeling
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  CHAITANYA BHARATHI INSTITUTE OF TECHNOLOGY (A)
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    VLSI Design-ECE-E3-AY-2020-21
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    Course info

    1. Home
    2. Courses
    3. Electronics and Communications Engineering
    4. UG
    5. Academic Year 2020-21
    6. VII Semester
    7. VLSI Design-ECE-E3-AY-2020-21
    8. Summary

    VLSI Design-ECE-E3-AY-2020-21

    • Teacher: Dr.N.Alivelu Manga Associate Professor
    Skill Level: Beginner

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